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Created April 10, 2022 16:49
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RE650 v2 boot log
Raw
boot.log
===================================================================
MT7621 stage1 code Dec 16 2019 17:45:55 (ASIC)
CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL2 FB_DL: 0xa, 1/0 = 610/414 29000000
PLL3 FB_DL: 0x13, 1/0 = 669/355 4D000000
PLL4 FB_DL: 0x1a, 1/0 = 773/251 69000000
DDR patch working
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
000E:| 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
000F:| 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
0010:| 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
0011:| 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DRAMC_DQSCTL1[0e0]=13000000
DRAMC_DQSGCTL[124]=80000033
rank 0 coarse = 15
rank 0 fine = 48
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_DDR2CTL[07c]=C287221D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0F0F0B0F
DRAMC_DQIDLY2[214]=0C0F0D0F
DRAMC_DQIDLY3[218]=0C0C090C
DRAMC_DQIDLY4[21c]=0B0B0D0A
DRAMC_R0DELDLY[018]=00001F21
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 14 11 14 14 13 11 15 10 10 9
10 | 10 11 10 12 11 9
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =33 DQS1 = 31
==================================================================
bit DQS0 bit DQS1
0 (1~60)30 8 (0~59)29
1 (2~64)33 9 (2~60)31
2 (1~61)31 10 (1~58)29
3 (1~62)31 11 (1~59)30
4 (1~61)31 12 (1~62)31
5 (2~61)31 13 (1~59)30
6 (1~61)31 14 (1~61)31
7 (1~61)31 15 (1~58)29
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 15 11 15 15 15 13 15 12 12 9
10 | 12 12 10 13 11 11
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:88
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=500000000 HZ BUS=166666666 HZ
===================================================================
U-Boot 1.1.3 (Sep 7 2021 - 19:31:32)
Board: Ralink APSoC DRAM: 128 MB
relocate_code Pointer at: 87fb8000
Config XHCI 40M PLL
flash manufacture id: 1c, device id 70 17
Warning: un-recognized chip ID, please update bootloader!
*** Warning - bad CRC, using default environment
============================================
Ralink UBoot Version: 5.0.0.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Sep 7 2021 Time:19:31:32
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =128 Mbytes
#Reset_MT7530
gpioMode Reg: 0x4852c
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
 0
3: System Boot system code via Flash.
## Booting image at bfc20000 ...
text base: 80001000
entry point: 80549890
Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80549890) ...
## Giving linux memsize in MB, 128
Starting kernel ...
LINUX started...
THIS IS ASIC
SDK 5.0.S.0
Linux version 3.10.14 (jenkins@Sohoiipf) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #1 SMP Tue Sep 7 19:37:15 CST 2021
The CPU feqenuce set to 880 MHz
GCMP present
CPU0 revision is: 0001992f (MIPS 1004Kc)
Software DMA cache coherency
Determined physical RAM map:
memory: 08000000 @ 00000000 (usable)
Zone ranges:
Normal [mem 0x00000000-0x07ffffff]
Movable zone start for each node
Early memory node ranges
node 0: [mem 0x00000000-0x07ffffff]
On node 0 totalpages: 32768
free_area_init_node: node 0, pgdat 807c3d80, node_mem_map 81000000
Normal zone: 256 pages used for memmap
Normal zone: 0 pages reserved
Normal zone: 32768 pages, LIFO batch:7
Detected 3 available secondary CPU(s)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
PERCPU: Embedded 8 pages/cpu @81103000 s10496 r8192 d14080 u32768
pcpu-alloc: s10496 r8192 d14080 u32768 alloc=8*4096
pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
Kernel command line: console=ttyS1,57600n8 root=/dev/mtdblock3 init=/sbin/init earlyprintk debug
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Writing ErrCtl register=0003a04c
Readback ErrCtl register=0003a04c
Memory: 121184k/131072k available (5454k kernel code, 9888k reserved, 2501k data, 360k init, 0k highmem)
Hierarchical RCU implementation.
NR_IRQS:128
console [ttyS1] enabled
Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
ftrace: allocating 15493 entries in 31 pages
launch: starting cpu1
launch: cpu1 gone!
CPU1 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 1: done.
launch: starting cpu2
launch: cpu2 gone!
CPU2 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 2: done.
launch: starting cpu3
launch: cpu3 gone!
CPU3 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 3: done.
Brought up 4 CPUs
NET: Registered protocol family 16
release PCIe RST: RALINK_RSTCTRL = 7000000
PCIE PHY initialize
***** Xtal 40MHz *****
start MT7621 PCIe register access
RALINK_RSTCTRL = 7000000
RALINK_CLKCFG1 = 77ffeff8
*************** MT7621 PCIe RC mode *************
PCIE2 no card, disable it(RST&CLK)
pcie_link status = 0x3
RALINK_RSTCTRL= 3000000
*** Configure Device number setting of Virtual PCI-PCI bridge ***
RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
PCIE0 enabled
PCIE1 enabled
interrupt enable status: 300000
Port 1 N_FTS = 1b105000
Port 0 N_FTS = 1b105000
config reg done
init_rt2880pci done
FPU Affinity set after 4688 emulations
bio: create slab <bio-0> at 0
SCSI subsystem initialized
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
pci 0000:00:00.0: reg 10: [mem 0x00000000-0x7fffffff]
pci 0000:00:00.0: reg 14: [mem 0x00000000-0x0000ffff]
pci 0000:00:00.0: supports D1
pci 0000:00:00.0: PME# supported from D0 D1 D3hot
pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400
pci 0000:00:01.0: reg 10: [mem 0x00000000-0x7fffffff]
pci 0000:00:01.0: reg 14: [mem 0x00000000-0x0000ffff]
pci 0000:00:01.0: supports D1
pci 0000:00:01.0: PME# supported from D0 D1 D3hot
pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:01:00.0: [14c3:7615] type 00 class 0x000280
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x000fffff 64bit]
pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
pci 0000:02:00.0: [14c3:7615] type 00 class 0x000280
pci 0000:02:00.0: reg 10: [mem 0x00000000-0x000fffff 64bit]
pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02
pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 02
pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
pci 0000:00:01.0: PCI bridge to [bus 02]
pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff]
PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
BAR0 at slot 0 = 0
bus=0x0, slot = 0x0
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60200000
res[1]->end = 6020ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
BAR0 at slot 1 = 0
bus=0x0, slot = 0x1
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60210000
res[1]->end = 6021ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0, irq=0x4
res[0]->start = 60000000
res[0]->end = 600fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x2, slot = 0x1, irq=0x18
res[0]->start = 60100000
res[0]->end = 601fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
Switching to clocksource MIPS
NET: Registered protocol family 2
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP: reno registered
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
PCI: CLS 80 bytes, default 32
4 CPUs re-calibrate udelay(lpj = 1167360)
squashfs: version 4.0 (2009/01/31) Phillip Lougher
msgmni has been set to 236
io scheduler noop registered (default)
reg_int_mask=0, INT_MASK= 0
HSDMA_init
hsdma_phy_tx_ring0 = 0x07dcc000, hsdma_tx_ring0 = 0xa7dcc000
hsdma_phy_rx_ring0 = 0x07dd0000, hsdma_rx_ring0 = 0xa7dd0000
TX_CTX_IDX0 = 0
TX_DTX_IDX0 = 0
RX_CRX_IDX0 = 3ff
RX_DRX_IDX0 = 0
set_fe_HSDMA_glo_cfg
HSDMA_GLO_CFG = 465
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
TP-LINK gpio driver initialized
brd: module loaded
flash manufacture id: 1c, device id 70 17
Warning: un-recognized chip ID, please update SPI driver!
EN25Q64(1c 30171c30) (8192 Kbytes)
mtd .name = raspi, .size = 0x00800000 (8M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
Creating 5 MTD partitions on "raspi":
0x000000000000-0x000000800000 : "ALL"
0x000000000000-0x000000020000 : "fs-uboot"
0x000000020000-0x000000350000 : "os-image"
0x000000350000-0x0000007c0000 : "file-system"
0x0000007f0000-0x000000800000 : "radio"
register mt_drv
== pAd = c0181000, size = 4589248, Status=0 ==
pAd->PciHif.CSRBaseAddress =0xc0080000, csr_addr=0xc0080000!
RTMPInitPCIeDevice():device_id=0x7615
mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
AP Driver version-5.0.3.1
RtmpChipOpsHook(223): Not support for HIF_MT yet! MACVersion=0x0
mt7615_init()-->
Use 1st iPAeLNA default bin.
Use 0st /etc/MT7615E_EEPROM1.bin default bin.
<--mt7615_init()
<-- RTMPAllocTxRxRingMemory, Status=0
== pAd = c0701000, size = 4589248, Status=0 ==
pAd->PciHif.CSRBaseAddress =0xc0600000, csr_addr=0xc0600000!
RTMPInitPCIeDevice():device_id=0x7615
mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
AP Driver version-5.0.3.1
RtmpChipOpsHook(223): Not support for HIF_MT yet! MACVersion=0x0
mt7615_init()-->
Use 2nd iPAeLNA default bin.
Use 1st /etc/MT7615E_EEPROM2.bin default bin.
<--mt7615_init()
<-- RTMPAllocTxRxRingMemory, Status=0
rdm_major = 253
GMAC1_MAC_ADRH -- : 0x0000000c
GMAC1_MAC_ADRL -- : 0x4328805c
Ralink APSoC Ethernet Driver Initilization. v3.1 1024 rx/tx descriptors allocated, mtu = 1500!
GMAC1_MAC_ADRH -- : 0x0000000c
GMAC1_MAC_ADRL -- : 0x43288001
PROC INIT OK!
TCP: cubic registered
NET: Registered protocol family 17
8021q: 802.1Q VLAN Support v1.8
VFS: Mounted root (squashfs filesystem) readonly on device 31:3.
Freeing unused kernel memory: 360K (807c6000 - 80820000)
procd: Console is alive
procd: - preinit -
mounting /dev/root
procd: - early -
procd: - ubus -
procd: - init -
Please press Enter to activate this console.
bridge: Successed to create netlink socket
liblog: module license 'unspecified' taints kernel.
Disabling lock debugging due to kernel taint
reloadprofile() begin
reloadprofile() end
reloadconfig() begin
get_upgrade_level() begin
/tmp/default-config/config/upgrade: No such file or directory
============> upgrade_level = 0
get_upgrade_level() end
get_upgrade_level() begin
/tmp/user-config/config/upgrade: No such file or directory
============> upgrade_level = 0
get_upgrade_level() end
!!!!===> not do resetandmergeconfig .....
reloadconfig() end
user has set country
device is not production models, do nothing!!!
loadRepeaterProductInfo() end
tplink: try to open!
[GPIOD][gpio_create_ibus_thread:35]create ibus thread successfully
0: 0:FFFFFFD8:FFFFFFBA: 5:FFFFFF80
Raeth v3.1 (Tasklet)
set CLK_CFG_0 = 0x40a00020!!!!!!!!!!!!!!!!!!1
phy_free_head is 0x6326000!!!
phy_free_tail_phy is 0x6327ff0!!!
txd_pool=a6328000 phy_txd_pool=06328000
ei_local->skb_free start address is 0x86eea6dc.
free_txd: 06328010, ei_local->cpu_ptr: 06328000
POOL HEAD_PTR | DMA_PTR | CPU_PTR
----------------+---------+--------
0xa6328000 0x06328000 0x06328000
phy_qrx_ring = 0x06323000, qrx_ring = 0xa6323000
phy_rx_ring0 = 0x06330000, rx_ring0 = 0xa6330000
MT7530 Reset Completed!!
change HW-TRAP to 0x17ccf
set LAN/WAN LLLLW
GMAC1_MAC_ADRH -- : 0x0000b4b0
GMAC1_MAC_ADRL -- : 0x24029535
CDMA_CSG_CFG = 81000000
GDMA1_FWD_CFG = 20710000
===>> br_fdb_change_mac_address:163 call fdb_insert
===>> fdb_create:549 mac:b4:b0:24:02:95:35
===>> fdb_create:551 fdb.dst is set as null
fdb_create:543 source is null
device eth2 entered promiscuous mode
br-lan: port 1(eth2) entered forwarding state
br-lan: port 1(eth2) entered forwarding state
===>> fdb_insert:630 mac:b4:b0:24:02:95:35
===>> fdb_insert:632 fdb.dst is null, skip and create again
br-lan: adding interface eth2 with same address as a received packet
tz isGMT-01:00
[SMARTIPD] [smartip_create_ibus_thread 40] create ibus thread successfully
smartipd-----update address pool : start: 100 end: 199
gw_str:192.168.0.254, dns_str:192.168.0.254
[SMARTIPD] [smartip_generate_udhcpd_cfg 1908] smartip generate udhcpd conf read success. readcount = 0
[SMARTIPD] [smartip_start_process 740] smartipd start udhcpd...........
[SMARTIPD] [onemesh_get_mesh_enable 952] Parse JSON failed!
server: 192.168.0.100wifid[mtk_init_platform:6760]: mtk init platform start.
wifid[wifi_create_ibus_thread:40]: Create ibus thread successfully
[SMARTIPD] [smartip_receive_event 66] smartipd received action: 2
[SMARTIPD] [smartip_receive_event 119] in ibus action wifi: set prelink_status to FALSE
wifid[wifi_exec_cmd:1930]: iwpriv apclii0 set DfsPrelink=0
wifid[wifi_get_production_models:462]: get char 0
wifid[wifi_exec_cmd:1930]: mkdir -p /tmp/wireless/
wifid[wifi_exec_cmd:1930]: cp /etc/wireless/2G_Profile.dat /tmp/wireless/2G_Profile.dat
wifid[wifi_exec_cmd:1930]: cp /etc/wireless/5G_Profile.dat /tmp/wireless/5G_Profile.dat
wifid[_init_config_file:2370]:
++++++++l_mtk.DFS_support = TRUE+++++++++
scanTime_2G:15 scanTime_5G:18
wifid[wifi_exec_cmd:1930]: wifi forcesetscantime 15 36
wifid[wifi_exec_cmd:1930]: switch_config.sh 1
[SMARTIPD] [smartip_get_wired_connect_status 505] parse file '/tmp/monitor_runtime_info' failed
[SMARTIPD] [smartip_get_wired_cra0: ===> main_virtual_if_open
onnect_status 50init l1profile with ra0 dev_idx 1 for index INDEX1
5] parse file '/profile_path=/tmp/wireless/2G_Profile.dat
tmp/monitor_runtEEPROM_name=e2p
ime_info' failedEEPROM_offset=0x0
[SMARTIPD] [smEEPROM_size=0x4000
artip_start_procmain_ifname=ra0
ess 749] smartipext_ifname=ra
d start udhcpc..apcli_ifname=apcli
........
wifid[single_sku_path=/etc/wireless/RT2860AP/SingleSKU.dat
wifi_exec_cmd:19bf_sku_path=/etc/wireless/RT2860AP/SingleSKU_BF.dat
30]: ifconfig raload l1profile succeed!
0 up
[DHCPC] stdriver_own()::Try to Clear FW Own...
art udhcpc.........
driver_own()::Success to clear FW Own
UserCfgInit 1609 Clear ApCliAutoConnectRunning.
[DHCPC] Sending UserCfgInit 1609 Clear ApCliAutoConnectRunning.
discover...at nuUserCfgInit:1963 pAd->ed_sta_threshold = 1, pAd->ed_ap_threshold = 1
mber 0
[DHCPC] RtmpOSFileOpen(): Error 2 opening /etc/Wireless/iNIC/iNIC_ap_5G.dat
Sending discoverOpen file "/etc/Wireless/iNIC/iNIC_ap_5G.dat" failed!
...at Unicast
E2pAccessMode=2
SSID[0]=Marcin-Office-24, EdcaIdx=0
SSID[1]=, EdcaIdx=0
DBDC Mode=0, eDBDC_mode = 0
BSS0 PhyMode=14
wmode_band_equal(): Band Equal!
[TxPower] BAND0: 100
[PERCENTAGEenable] BAND0: 1
FragThreshold[0]=2346
pAd->ed_sta_threshold = 2
read_etxbf: ETxBfEnCond = 1
read_etxbf: BSSID[0]
read_etxbf: MBSS[0] ETxBfEnCond = 1
read_etxbf: More BSSID[1]
read_etxbf: More MBSS[1] ETxBfEnCond = 1
[RTMPSetProfileParameters]Disable DFS/Zero wait=0/0
HT: WDEV[0] Ext Channel = ABOVE
HT: greenap_cap = 0
WtcSetMaxStaNum: BssidNum:2, MaxStaNum:123 (WdsNum:0, ApcliNum:2, MaxNumChipRept:32), MinMcastWcid:124
Top Init Done!
Use alloc_skb
RX[0] DESC a6da8000 size = 16384
RX[1] DESC a6dac000 size = 8192
cut_through_init(): ct sw token number = 4095
cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
cut_through_token_list_init(): 86348588,86348588
cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
cut_through_token_list_init(): 86348598,86348598
Hif Init Done!
ctl->txq = c0b5bdd8
ctl->rxq = c0b5bde4
ctl->ackq = c0b5bdf0
ctl->kickq = c0b5bdfc
ctl->tx_doneq = c0b5be08
ctl->rx_doneq = c0b5be14
====>[debug]ctrl_fw_state_v2: target_stage = 1
====>[debug]ctrl_fw_state_v2: sucess, target stage = 1, current sync CR = 1
Parsing patch header
Built date: 20200525111720a
Platform: ALPS
HW/SW version: 0x8a108a10
Patch version: 0x00000010
Target address: 0x80000, length: 11072
patch is not ready && get semaphore success
EventGenericEventHandler: CMD Success
MtCmdPatchFinishReq
EventGenericEventHandler: CMD Success
release patch semaphore
WfMcuHwInit: Before NICLoadFirmware, check ICapMode = 0
====>[debug]ctrl_fw_state_v2: target_stage = 1
====>[debug]ctrl_fw_state_v2: sucess, target stage = 1, current sync CR = 1
Parsing CPU 0 fw tailer
Chip ID: 0x04
Eco version: 0x00
Region number: 0x00
Format version: 0x00
Ram version: _reserved_
Built date: 20200525112406
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