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Xeon Silver 4410Y
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| Intel(R) Xeon(R) Silver 4410Y |
Author
cyring
commented
Aug 17, 2025
Author
Processor [Intel(R) Xeon(R) Silver 4410Y]
|- Architecture [Sapphire Rapids]
|- Vendor ID [GenuineIntel]
|- Microcode [0x2b000639]
|- Signature [ 06_8F]
|- Stepping [ 8]
|- Online CPU [ 48/ 48]
|- Base Clock [ 99.998]
|- Frequency (MHz) Ratio
Min 799.99 < 8 >
Max 1999.97 < 20 >
|- Factory [100.000]
2000 [ 20 ]
|- Performance
TGT 799.99 < 8 >
|- HWP
Min 799.99 < 8 >
Max 3899.94 < 39 >
TGT AUTO < 0 >
|- Turbo Boost [ UNLOCK]
1C 3899.94 < 39 >
2C 3899.94 < 39 >
3C 3399.94 < 34 >
4C 2999.95 < 30 >
5C 2799.95 < 28 >
6C 2799.95 < 28 >
7C 2799.95 < 28 >
8C 2799.95 < 28 >
9C 399.99 < 4 >
10C 599.99 < 6 >
11C 799.99 < 8 >
12C 999.98 < 10 >
13C 1199.98 < 12 >
14C 1199.98 < 12 >
15C 1199.98 < 12 >
16C 1199.98 < 12 >
|- Uncore [ UNLOCK]
Min 799.99 < 8 >
Max 1999.97 < 20 >
|- TDP Level < 0:3 >
|- Programmable [ UNLOCK]
|- Configuration [ UNLOCK]
|- Turbo Activation [ UNLOCK]
Nominal 1999.97 [ 20 ]
Turbo AUTO < 0 >
Instruction Set Extensions
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y]
|- AMX-BF16 [Y] AMX-TILE [Y] AMX-INT8 [Y] AMX-FP16 [N]
|- AVX512-F [Y] AVX512-DQ [Y] AVX512-IFMA [Y] AVX512-PF [N]
|- AVX512-ER [N] AVX512-CD [Y] AVX512-BW [Y] AVX512-VL [Y]
|- AVX512-VBMI [Y] AVX512-VBMI2 [Y] AVX512-VNNI [Y] AVX512-ALG [Y]
|- AVX512-VPOP [Y] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N]
|- AVX512-BF16 [Y] AVX-VNNI-VEX [Y] AVX-VNN-INT8 [N] AVX-NE-CONV [N]
|- AVX-IFMA [N] CMPccXADD [N] MOVDIRI [Y] MOVDIR64B [Y]
|- BMI1/BMI2 [Y/Y] CLWB [Y] CLFLUSH [Y] CLFLUSH-OPT [Y]
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y]
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y]
|- ENQCMD [Y] GFNI [Y] OSPKE [Y] WAITPKG [Y]
|- MMX/Ext [Y/N] MON/MWAITX [Y/N] MOVBE [Y] PCLMULQDQ [Y]
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y]
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y]
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/N] SSE4.2 [Y]
|- SERIALIZE [Y] SYSCALL [Y] RDPID [Y] SGX [Y]
|- VAES [Y] VPCLMULQDQ [Y] PREFETCH/W [Y] LZCNT [Y]
Features
|- 1 GB Pages Support 1GB-PAGES [Capable]
|- Advanced Configuration & Power Interface ACPI [Capable]
|- Advanced Programmable Interrupt Controller APIC [Capable]
|- APIC Timer Invariance ARAT [Capable]
|- Core Multi-Processing CMP Legacy [Missing]
|- L1 Data Cache Context ID CNXT-ID [Missing]
|- Direct Cache Access DCA [Capable]
|- Debugging Extension DE [Capable]
|- Debug Store & Precise Event Based Sampling DS, PEBS [Capable]
|- CPL Qualified Debug Store DS-CPL [Capable]
|- 64-Bit Debug Store DTES64 [Capable]
|- Fast Short REP CMPSB|SCASB FSRC [Capable]
|- Fast Short REP MOVSB FSRM [Capable]
|- Fast Short REP STOSB FSRS [Capable]
|- Fast Zero-length REP MOVSB FZRM [Capable]
|- Fast-String Operation ERMS [Capable]
|- Fused Multiply Add FMA [Capable]
|- Flexible Return and Event Delivery FRED [Missing]
|- Hardware Feedback Interface HFI [Capable]
|- Hardware Lock Elision HLE [Missing]
|- Hyper-Threading Technology HTT [Capable]
|- History Reset HRESET [Missing]
|- Hybrid part processor HYBRID [Missing]
|- Instruction Based Sampling IBS [Missing]
|- Instruction INVPCID INVPCID [Capable]
|- Long Mode 64 bits IA64 | LM [Capable]
|- Linear Address Space Separation LASS [Missing]
|- Linear Address Masking LAM [Missing]
|- Load Kernel GS segment register LKGS [Missing]
|- LightWeight Profiling LWP [Missing]
|- Machine-Check Architecture MCA [Capable]
|- Memory Protection Extensions MPX [Missing]
|- Model Specific Registers MSR [Capable]
|- Memory Type Range Registers MTRR [Capable]
|- No-Execute Page Protection NX [Capable]
|- OS-Enabled Ext. State Management OSXSAVE [Capable]
|- Physical Address Extension PAE [Capable]
|- Page Attribute Table PAT [Capable]
|- Pending Break Enable PBE [Capable]
|- Platform Configuration PCONFIG [Capable]
|- Process Context Identifiers PCID [Capable]
|- Perfmon and Debug Capability PDCM [Capable]
|- Page Global Enable PGE [Capable]
|- Page Size Extension PSE [Capable]
|- 36-bit Page Size Extension PSE36 [Capable]
|- Processor Serial Number PSN [Missing]
|- Write Data to a Processor Trace Packet PTWRITE [Capable]
|- PREFETCHIT0/1 Instructions PREFETCHI [Missing]
|- Resource Director Technology/PQE RDT-A [Capable]
|- Resource Director Technology/PQM RDT-M [Capable]
|- Restricted Transactional Memory RTM [Missing]
|- Safer Mode Extensions SMX [Capable]
|- Self-Snoop SS [Capable]
|- Supervisor-Mode Access Prevention SMAP [Capable]
|- Supervisor-Mode Execution Prevention SMEP [Capable]
|- Thread Director TD [Missing]
|- Time Stamp Counter TSC [Invariant]
|- Time Stamp Counter Deadline TSC-DEADLINE [Capable]
|- TSX Force Abort MSR Register TSX-ABORT [Missing]
|- TSX Suspend Load Address Tracking TSX-LDTRK [Capable]
|- User-Mode Instruction Prevention UMIP [Capable]
|- Virtual Mode Extension VME [Capable]
|- Virtual Machine Extensions VMX [Capable]
|- Write Back & Do Not Invalidate Cache WBNOINVD [Capable]
|- Extended xAPIC Support x2APIC [ xAPIC]
|- Execution Disable Bit Support XD-Bit [Capable]
|- XSAVE/XSTOR States XSAVE [Capable]
|- xTPR Update Control xTPR [Capable]
Mitigation mechanisms
|- Indirect Branch Restricted Speculation IBRS [ Enable]
|- Indirect Branch Prediction Barrier IBPB [Capable]
|- Single Thread Indirect Branch Predictor STIBP [Capable]
|- Speculative Store Bypass Disable SSBD [Capable]
|- Writeback & invalidate the L1 data cache L1D-FLUSH [Capable]
|- Hypervisor - No flush L1D on VM entry L1DFL_VMENTRY_NO [ Enable]
|- Arch - Buffer Overwriting MD-CLEAR [Capable]
|- Arch - No Rogue Data Cache Load RDCL_NO [ Enable]
|- Arch - Enhanced IBRS IBRS_ALL [ Enable]
|- Arch - Return Stack Buffer Alternate RSBA [Capable]
|- Arch - No Speculative Store Bypass SSB_NO [Capable]
|- Arch - No Microarchitectural Data Sampling MDS_NO [ Enable]
|- Arch - No TSX Asynchronous Abort TAA_NO [ Enable]
|- Arch - No Page Size Change MCE PSCHANGE_MC_NO [ Enable]
|- Arch - STLB QoS STLB [ Enable]
|- Arch - Functional Safety Island FuSa [ Enable]
|- Arch - RSM in CPL0 only RSM [ Enable]
|- Arch - Split Locked Access Exception SPLA [ Enable]
|- Arch - Snoop Filter QoS Mask SNOOP_FILTER [ Enable]
|- Arch - No Fast Predictive Store Forwarding PSFD [Capable]
|- Arch - Data Operand Independent Timing Mode DOITM [Capable]
|- Arch - Not affected by SBDR or SSDP SBDR_SSDP_NO [ Enable]
|- Arch - No Fill Buffer Stale Data Propagator FBSDP_NO [ Enable]
|- Arch - No Primary Stale Data Propagator PSDP_NO [ Enable]
|- Arch - Overwrite Fill Buffer values FB_CLEAR [Capable]
|- Arch - Special Register Buffer Data Sampling SRBDS [ Unable]
|- RDRAND and RDSEED mitigation RNGDS [ Unable]
|- Restricted Transactional Memory RTM [ Unable]
|- Verify Segment for Writing instruction VERW [ Unable]
|- Arch - Restricted RSB Alternate RRSBA [ Enable]
|- Arch - No Branch Target Injection BHI_NO [Capable]
|- Arch - Legacy xAPIC Disable XAPIC_DIS [Capable]
|- Arch - No Post-Barrier Return Stack Buffer PBRSB_NO [Capable]
|- Arch - No Gather Data Sampling GDS_NO [ Enable]
|- Arch - No Register File Data Sampling RFDS_NO [ Enable]
|- Arch - IPRED disabled for CPL3 IPRED_DIS_U [Capable]
|- Arch - IPRED disabled for CPL0/1/2 IPRED_DIS_S [Capable]
|- Arch - RRSBA disabled for CPL3 RRSBA_DIS_U [Capable]
|- Arch - RRSBA disabled for CPL0/1/2 RRSBA_DIS_S [Capable]
|- Arch - Data Dependent Prefetcher CPL3 DDPD_U_DIS [ Unable]
|- Arch - BHI disabled for CPL0/1/2 BHI_DIS_S [ Enable]
|- No MXCSR Configuration Dependent Timing MCDT_NO [ Unable]
|- No MONITOR/UMONITOR mitigation UMON_MITG_NO [ Unable]
|- Overclocking
|- Overclocking Utilized UTILIZED [Capable]
|- Undervolt Protection UVP [ Enable]
|- Overclocking Secure Status UNLOCKED [ Enable]
Security Features
|- CPUID Key Locker KL [Missing]
|- AES Key Locker instructions AESKLE [Missing]
|- CET Shadow Stack features CET-SS [Capable]
|- CET Indirect Branch Tracking CET-IBT [Capable]
|- CET Supervisor Shadow Stack CET-SSS [Capable]
|- AES Wide Key Locker instructions WIDE_KL [Missing]
|- Software Guard SGX1 Extensions SGX1 [Missing]
|- Software Guard SGX2 Extensions SGX2 [Missing]
Technologies
|- Data Cache Unit
|- L1 Prefetcher L1 HW < ON>
|- L1 IP Prefetcher L1 HW IP < ON>
|- L1 Next Page Prefetcher L1 NPP <OFF>
|- L1 Scrubbing L1 Scrubbing <OFF>
|- Cache Prefetchers
|- L2 Prefetcher L2 HW < ON>
|- L2 Adjacent Cache Line Prefetcher L2 HW CL < ON>
|- L2 Adaptive Multipath Probability L2 AMP <OFF>
|- L2 Next Line Prefetcher L2 NLP <OFF>
|- LLC Streamer LLC <OFF>
|- System Management Mode SMM-Dual [ ON]
|- Hyper-Threading HTT [ ON]
|- SpeedStep EIST < ON>
|- Dynamic Acceleration IDA [ ON]
|- Turbo Boost TURBO < ON>
|- Energy Efficiency Optimization EEO <OFF>
|- Race To Halt Optimization R2H <OFF>
|- Watchdog Timer TCO <OFF>
|- Virtualization VMX [ ON]
|- I/O MMU VT-d [OFF]
|- Version [ N/A]
|- Hypervisor [OFF]
|- Vendor ID [ N/A]
|- Volume Management Device VMD [OFF]
|- Gaussian & Neural Accelerator GNA [OFF]
|- Digital Content Protection HDCP [OFF]
|- Image Processing Unit IPU [OFF]
|- Vision Processing Unit VPU [OFF]
|- Overclocking OC [OFF]
Performance Monitoring
|- Version PM [ 5]
|- Counters: General Fixed
| { 8, 0, 0 } x 48 bits 4 x 48 bits
|- Enhanced Halt State C1E <OFF>
|- C1 Auto Demotion C1A <OFF>
|- C3 Auto Demotion C3A <OFF>
|- C1 UnDemotion C1U <OFF>
|- C3 UnDemotion C3U <OFF>
|- C6 Core Demotion CC6 <OFF>
|- C6 Module Demotion MC6 <OFF>
|- Legacy Frequency ID control FID [OFF]
|- Legacy Voltage ID control VID [OFF]
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON]
|- Hardware Duty Cycling HDC [N/A]
|- Package C-States
|- Configuration Control CONFIG [ UNLOCK]
|- Lowest C-State LIMIT < C6>
|- I/O MWAIT Redirection IOMWAIT < Enable>
|- Max C-State Inclusion RANGE < C1>
|- Core C-States
|- C-States Base Address BAR [ 0x514 ]
|- ACPI Processor C-States _CST [Missing]
|- MONITOR/MWAIT
|- State index: #0 #1 #2 #3 #4 #5 #6 #7
|- Sub C-State: 0 2 0 1 0 0 0 0
|- Monitor-Mwait Extensions EMX [Capable]
|- Interrupt Break-Event IBE [Capable]
|- Core Cycles [Capable]
|- Instructions Retired [Capable]
|- Reference Cycles [Capable]
|- Last Level Cache References [Capable]
|- Last Level Cache Misses [Capable]
|- Branch Instructions Retired [Capable]
|- Branch Mispredicts Retired [Capable]
|- Top-down slots Counter [Capable]
|- Processor Performance Control _PCT [Missing]
|- Performance Supported States _PSS [Missing]
|- Performance Present Capabilities _PPC [Missing]
Power, Current & Thermal
|- Temperature Offset:Junction TjMax < 0: 93 C>
|- Clock Modulation ODCM <Disable>
|- DutyCycle [ 0.00%]
|- Power Management PWR MGMT [ LOCK]
|- Energy Policy Bias Hint < 6>
|- Energy Policy HWP EPP < 32>
|- Digital Thermal Sensor DTS [Capable]
|- Power Limit Notification PLN [Capable]
|- Package Thermal Management PTM [Capable]
|- Thermal Monitor 1 TM1 [ Enable]
|- Thermal Monitor 2 TM2 [Capable]
|- Thermal Design Power TDP [ 150 W]
|- Minimum Power Min [ 104 W]
|- Maximum Power Max [ 323 W]
|- Thermal Design Power Package < Enable>
|- Power Limit PL1 < 150 W>
|- Time Window TW1 < 1 s>
|- Power Limit PL2 < 180 W>
|- Time Window TW2 < 11 ms>
|- Thermal Design Power Core <Disable>
|- Power Limit PL1 < 0 W>
|- Time Window TW1 < 976 us>
|- Thermal Design Power Uncore [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 976 us]
|- Thermal Design Power DRAM [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 976 us]
|- Thermal Design Power Platform [Disable]
|- Power Limit PL1 [ 0 W]
|- Time Window TW1 [ 976 us]
|- Power Limit PL2 [ 0 W]
|- Time Window TW2 [ 976 us]
|- Electrical Design Current EDC [Missing]
|- Thermal Design Current TDC [Missing]
|- Core Thermal Point
|- DTS Threshold #1 Threshold [Missing]
|- DTS Threshold #2 Threshold [Missing]
|- Package Thermal Point
|- DTS Threshold #1 Threshold [Missing]
|- DTS Threshold #2 Threshold [Missing]
|- Units
|- Power watt [ 0.125000000]
|- Energy joule [ 0.000061035]
|- Window second [ 0.000976562]
Linux:
|- Release [6.12.32+bpo-amd64]
|- Version [#1 SMP PREEMPT_DYNAMIC Debian 6.12.32-1~bpo12+1 (2025-06-21)]
|- Machine [x86_64]
Memory:
|- Total RAM 527914664 KB
|- Shared RAM 3544 KB
|- Free RAM 22523656 KB
|- Buffer RAM 556 KB
|- Total High 0 KB
|- Free High 0 KB
Clock Source < tsc>
CPU-Freq driver [ intel_pstate]
Governor [ Missing]
CPU-Idle driver [ intel_idle]
|- Idle Limit [ C6]
|- State POLL C1 C1E C6
|- CPUIDLE MWAIT 0 MWAIT 0 MWAIT 0
|- Power -1 0 0 0
|- Latency 0 1 2 290
|- Residency 0 1 4 800
CPU Pkg Apic Core/Thread Caches (w)rite-Back (i)nclusive
# ID ID ID ID L1-Inst Way L1-Data Way L2 Way L3 Way
000:BSP 0 0 0 32768 8 49152 12 2097152 16 31457280 15
001: 0 2 1 0 32768 8 49152 12 2097152 16 31457280 15
002: 0 4 2 0 32768 8 49152 12 2097152 16 31457280 15
003: 0 6 3 0 32768 8 49152 12 2097152 16 31457280 15
004: 0 8 4 0 32768 8 49152 12 2097152 16 31457280 15
005: 0 10 5 0 32768 8 49152 12 2097152 16 31457280 15
006: 0 12 6 0 32768 8 49152 12 2097152 16 31457280 15
007: 0 14 7 0 32768 8 49152 12 2097152 16 31457280 15
008: 0 16 8 0 32768 8 49152 12 2097152 16 31457280 15
009: 0 18 9 0 32768 8 49152 12 2097152 16 31457280 15
010: 0 20 10 0 32768 8 49152 12 2097152 16 31457280 15
011: 0 22 11 0 32768 8 49152 12 2097152 16 31457280 15
012: 1 128 0 0 32768 8 49152 12 2097152 16 31457280 15
013: 1 130 1 0 32768 8 49152 12 2097152 16 31457280 15
014: 1 132 2 0 32768 8 49152 12 2097152 16 31457280 15
015: 1 134 3 0 32768 8 49152 12 2097152 16 31457280 15
016: 1 136 4 0 32768 8 49152 12 2097152 16 31457280 15
017: 1 138 5 0 32768 8 49152 12 2097152 16 31457280 15
018: 1 140 6 0 32768 8 49152 12 2097152 16 31457280 15
019: 1 142 7 0 32768 8 49152 12 2097152 16 31457280 15
020: 1 144 8 0 32768 8 49152 12 2097152 16 31457280 15
021: 1 146 9 0 32768 8 49152 12 2097152 16 31457280 15
022: 1 148 10 0 32768 8 49152 12 2097152 16 31457280 15
023: 1 150 11 0 32768 8 49152 12 2097152 16 31457280 15
024: 0 1 0 1 32768 8 49152 12 2097152 16 31457280 15
025: 0 3 1 1 32768 8 49152 12 2097152 16 31457280 15
026: 0 5 2 1 32768 8 49152 12 2097152 16 31457280 15
027: 0 7 3 1 32768 8 49152 12 2097152 16 31457280 15
028: 0 9 4 1 32768 8 49152 12 2097152 16 31457280 15
029: 0 11 5 1 32768 8 49152 12 2097152 16 31457280 15
030: 0 13 6 1 32768 8 49152 12 2097152 16 31457280 15
031: 0 15 7 1 32768 8 49152 12 2097152 16 31457280 15
032: 0 17 8 1 32768 8 49152 12 2097152 16 31457280 15
033: 0 19 9 1 32768 8 49152 12 2097152 16 31457280 15
034: 0 21 10 1 32768 8 49152 12 2097152 16 31457280 15
035: 0 23 11 1 32768 8 49152 12 2097152 16 31457280 15
036: 1 129 0 1 32768 8 49152 12 2097152 16 31457280 15
037: 1 131 1 1 32768 8 49152 12 2097152 16 31457280 15
038: 1 133 2 1 32768 8 49152 12 2097152 16 31457280 15
039: 1 135 3 1 32768 8 49152 12 2097152 16 31457280 15
040: 1 137 4 1 32768 8 49152 12 2097152 16 31457280 15
041: 1 139 5 1 32768 8 49152 12 2097152 16 31457280 15
042: 1 141 6 1 32768 8 49152 12 2097152 16 31457280 15
043: 1 143 7 1 32768 8 49152 12 2097152 16 31457280 15
044: 1 145 8 1 32768 8 49152 12 2097152 16 31457280 15
045: 1 147 9 1 32768 8 49152 12 2097152 16 31457280 15
046: 1 149 10 1 32768 8 49152 12 2097152 16 31457280 15
047: 1 151 11 1 32768 8 49152 12 2097152 16 31457280 15
CPU Freq(MHz) VID Vcore TMP(C) Accumulator Energy(J) Power(W)
000 2.14 5207 0.6356 43 000000000000000000 0.000000000 0.000000000
001 1.65 5391 0.6581 45 000000000000000000 0.000000000 0.000000000
002 1.46 5227 0.6381 42 000000000000000000 0.000000000 0.000000000
003 6.76 5145 0.6281 42 000000000000000000 0.000000000 0.000000000
004 1.52 5248 0.6406 42 000000000000000000 0.000000000 0.000000000
005 1.90 5309 0.6481 40 000000000000000000 0.000000000 0.000000000
006 3.78 5084 0.6206 44 000000000000000000 0.000000000 0.000000000
007 2.38 5084 0.6206 44 000000000000000000 0.000000000 0.000000000
008 1.84 5227 0.6381 42 000000000000000000 0.000000000 0.000000000
009 12.58 5412 0.6606 44 000000000000000000 0.000000000 0.000000000
010 2.46 5084 0.6206 43 000000000000000000 0.000000000 0.000000000
011 1.75 5227 0.6381 43 000000000000000000 0.000000000 0.000000000
012 1.34 5125 0.6256 41 000000000000000000 0.000000000 0.000000000
013 2.26 5084 0.6206 39 000000000000000000 0.000000000 0.000000000
014 1.17 5186 0.6331 41 000000000000000000 0.000000000 0.000000000
015 1.15 5063 0.6180 41 000000000000000000 0.000000000 0.000000000
016 1.05 5207 0.6356 41 000000000000000000 0.000000000 0.000000000
017 5.21 5145 0.6281 38 000000000000000000 0.000000000 0.000000000
018 2.66 5063 0.6180 41 000000000000000000 0.000000000 0.000000000
019 6.49 5125 0.6256 40 000000000000000000 0.000000000 0.000000000
020 0.96 5145 0.6281 39 000000000000000000 0.000000000 0.000000000
021 1.19 5125 0.6256 41 000000000000000000 0.000000000 0.000000000
022 1.81 5063 0.6180 41 000000000000000000 0.000000000 0.000000000
023 1.88 5145 0.6281 39 000000000000000000 0.000000000 0.000000000
024 1.48 5207 0.6356 43 000000000000000000 0.000000000 0.000000000
025 1.27 5391 0.6581 45 000000000000000000 0.000000000 0.000000000
026 10.13 5227 0.6381 42 000000000000000000 0.000000000 0.000000000
027 1.56 5145 0.6281 42 000000000000000000 0.000000000 0.000000000
028 1.27 5227 0.6381 41 000000000000000000 0.000000000 0.000000000
029 1.03 5309 0.6481 40 000000000000000000 0.000000000 0.000000000
030 1.40 5063 0.6180 44 000000000000000000 0.000000000 0.000000000
031 1.12 5084 0.6206 44 000000000000000000 0.000000000 0.000000000
032 1.21 5248 0.6406 42 000000000000000000 0.000000000 0.000000000
033 1.26 5412 0.6606 44 000000000000000000 0.000000000 0.000000000
034 46.20 5084 0.6206 43 000000000000000000 0.000000000 0.000000000
035 1.57 5227 0.6381 43 000000000000000000 0.000000000 0.000000000
036 2.24 5104 0.6230 41 000000000000000000 0.000000000 0.000000000
037 1.05 5084 0.6206 39 000000000000000000 0.000000000 0.000000000
038 0.86 5186 0.6331 41 000000000000000000 0.000000000 0.000000000
039 0.95 5084 0.6206 41 000000000000000000 0.000000000 0.000000000
040 1.03 5207 0.6356 41 000000000000000000 0.000000000 0.000000000
041 0.49 5145 0.6281 38 000000000000000000 0.000000000 0.000000000
042 1.22 5063 0.6180 41 000000000000000000 0.000000000 0.000000000
043 4.21 5760 0.7031 40 000000000000000000 0.000000000 0.000000000
044 1.10 5145 0.6281 39 000000000000000000 0.000000000 0.000000000
045 0.84 5145 0.6281 41 000000000000000000 0.000000000 0.000000000
046 1.37 5063 0.6180 41 000000000000000000 0.000000000 0.000000000
047 1.12 5145 0.6281 39 000000000000000000 0.000000000 0.000000000
Package[1] Cores Uncore Memory Platform
Energy(J): 39.778564453 0.000000000 0.000000000 6.601379395 0.000000000
Power(W) : 39.778564453 0.000000000 0.000000000 6.601379395 0.000000000
|- Hardware-Controlled Performance States HWP < ON>
|- Capabilities Lowest Efficient Guaranteed Highest
|- CPU #0 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #1 500.00 ( 5) 800.00 ( 8) 1999.99 ( 20) 3899.99 ( 39)
|- CPU #2 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #3 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #4 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #5 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #6 500.00 ( 5) 800.00 ( 8) 2000.01 ( 20) 3900.02 ( 39)
|- CPU #7 500.01 ( 5) 800.01 ( 8) 2000.03 ( 20) 3900.06 ( 39)
|- CPU #8 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #9 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #10 500.01 ( 5) 800.01 ( 8) 2000.02 ( 20) 3900.04 ( 39)
|- CPU #11 500.01 ( 5) 800.01 ( 8) 2000.03 ( 20) 3900.06 ( 39)
|- CPU #12 500.00 ( 5) 800.01 ( 8) 2000.01 ( 20) 3900.02 ( 39)
|- CPU #13 500.00 ( 5) 800.00 ( 8) 1999.99 ( 20) 3899.99 ( 39)
|- CPU #14 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #15 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.01 ( 39)
|- CPU #16 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #17 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #18 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #19 499.99 ( 5) 799.99 ( 8) 1999.97 ( 20) 3899.94 ( 39)
|- CPU #20 500.00 ( 5) 800.00 ( 8) 2000.01 ( 20) 3900.01 ( 39)
|- CPU #21 500.00 ( 5) 800.00 ( 8) 1999.99 ( 20) 3899.99 ( 39)
|- CPU #22 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.01 ( 39)
|- CPU #23 499.99 ( 5) 799.99 ( 8) 1999.98 ( 20) 3899.96 ( 39)
|- CPU #24 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #25 500.00 ( 5) 800.00 ( 8) 1999.99 ( 20) 3899.99 ( 39)
|- CPU #26 500.00 ( 5) 799.99 ( 8) 1999.99 ( 20) 3899.98 ( 39)
|- CPU #27 500.01 ( 5) 800.01 ( 8) 2000.02 ( 20) 3900.05 ( 39)
|- CPU #28 500.01 ( 5) 800.01 ( 8) 2000.02 ( 20) 3900.05 ( 39)
|- CPU #29 500.01 ( 5) 800.01 ( 8) 2000.03 ( 20) 3900.05 ( 39)
|- CPU #30 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #31 500.00 ( 5) 800.00 ( 8) 1999.99 ( 20) 3899.99 ( 39)
|- CPU #32 500.00 ( 5) 800.00 ( 8) 2000.01 ( 20) 3900.01 ( 39)
|- CPU #33 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #34 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #35 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #36 500.00 ( 5) 799.99 ( 8) 1999.98 ( 20) 3899.96 ( 39)
|- CPU #37 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #38 500.00 ( 5) 799.99 ( 8) 1999.98 ( 20) 3899.96 ( 39)
|- CPU #39 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #40 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #41 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #42 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #43 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #44 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
|- CPU #45 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3899.99 ( 39)
|- CPU #46 500.00 ( 5) 800.00 ( 8) 1999.99 ( 20) 3899.99 ( 39)
|- CPU #47 500.00 ( 5) 800.00 ( 8) 2000.00 ( 20) 3900.00 ( 39)
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