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@cyring
Created August 27, 2025 11:03
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FPGA
@cyring
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cyring commented Sep 22, 2025

Gowin Analyzer Oscilloscope

TangNano-20K-example

  • Clone the examples from the repository
git clone [email protected]:sipeed/TangNano-20K-example.git

FPGA Designer

  • Start the Gowin FPGA Designer and load the project TangNano-20K-example/led/blink_led/blink_led.gprj

Analyzer Oscilloscope

  • Create a GAO Config File from menu File > New > GAO Config File
  • Choose the default Setting:
    • [o] For RTL Design
    • [o] Standard
  • Keep the suggested GAO Name as blink_led
    • and the sub-directory to TangNano-20K-example/led/blink_led/src
    • button [Next >] will add src/blink_led.rao to the current project

Signals

  • Back to the Design tree, double click the GAO file blink_led.rao

Trigger

  • From the Trigger Options tab
  • Double click Trigger Port 0
  • Click (+) to add a signal
    • Click [Search] button to popup the Nets window
    • Select count_1s[23:0] and add it to the right panel with button [>]
    • Validate with [OK]
    • You will get count_1s[23:0] assigned to the Port 0
  • In the middle column Match Units, double click the M0
    • You are in the Match Unit 0 where you select Trigger Port 0 from the drop-down box
    • With count_1s[23:0] selected, enter the decimal value 13500000
    • This matches condition in the Verilog code blink_led.v where ( count_1s < 27000000/2 )
    • Validate with [OK]
    • The match unit [x] M0 should be ticked
  • In the right column, add an expression
    • In the empty panel, right-click mouse button to choose menu [Add]
    • In the Expression calculator, click button M0
    • Validate with [OK]
    • Expression M0 should be listed

Capture

  • Choose the Capture Options tab
  • Click the 3-dots buttons to assign a sample clock
  • In the Nets popup window click [Search] to populate the left panel with signals
  • Select clk and add it to the right panel with [>] button
  • In the Capture Signals panel add two signals
    • [Search] for count_1s[23:0] and count_1s_flag
    • Click [>] to add both to the Capture Signals panel

Build

  • The GAO is all set up, save it from menu File > "Save blink_led.rao"
  • Back to the Process tree of the FPGA Designer, select Place & Route
  • Right-click mouse button to choose Clean&Rerun All
  • Accept to remove the previous results

Oscilloscope

  • Plug the TN20K to the PC from its USB-C cable
  • If ftdi_sio module present then unload it with sudo modprobe -r ftdi_sio
  • Choose menu Tools > Gowin Analyzer Oscilloscope
  • You should see all settings made so far:
    • exp0: M0 trigger expression
    • M0 match unit condition

Program fs

  • Tick option [o] Enable Programmer
  • Select the row which targets the GW2AR-18 device
  • Click button to program the TN20k
  • Once FPGA programmed, it will auto reset with the blink_led bitstream
    ...

@cyring
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cyring commented Sep 22, 2025

Acquisition

  • In green is displayed in the top bar [Ready to acquire]
  • Click Play to start the acquisition: the ( > ) round blue button
  • This will popup Oscilloscope window and the recorded signals
2025-09-22-113257_1280x960_scrot

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