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@cyring
Created August 2, 2025 08:55
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A12-9720P
AMD A12-9720P RADEON R7, 12 COMPUTE CORES 4C+8G
@cyring
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cyring commented Aug 2, 2025

(BIOS modded)

Processor                      [AMD A12-9720P RADEON R7, 12 COMPUTE CORES 4C+8G]
|- Architecture                                            [Bulldozer/Excavator]
|- Vendor ID                                                      [AuthenticAMD]
|- Microcode                                                        [0x0600611a]
|- Signature                                                           [  6F_65]
|- Stepping                                                            [      1]
|- Online CPU                                                          [  4/  4]
|- Base Clock                                                          [ 84.215]
|- Frequency            (MHz)                      Ratio                        
                 Min    673.72                    <   8 >                       
                 Max   2694.89                    <  32 >                       
|- Factory                                                             [100.000]
                       3200                       [  32 ]                       
|- Performance                                                                  
                 TGT   2273.81                    <  27 >                       
   |- P-State                                                                   
                 P1    3031.75                    <  36 >                       
                 P2    2442.25                    <  29 >                       
                 P3    2273.81                    <  27 >                       
                 P4    1936.95                    <  23 >                       
                 P5    1515.88                    <  18 >                       
                 P6    1179.01                    <  14 >                       
|- Uncore                                                              [   LOCK]
                                                                                
Instruction Set Extensions                                                      
|- 3DNow!/Ext [N/N]          ADX [N]          AES [Y]  AVX/AVX2 [Y/Y] 
|- AVX512-F     [N]    AVX512-DQ [N]  AVX512-IFMA [N]   AVX512-PF [N] 
|- AVX512-ER    [N]    AVX512-CD [N]    AVX512-BW [N]   AVX512-VL [N] 
|- AVX512-VBMI  [N] AVX512-VBMI2 [N]  AVX512-VNNI [N]  AVX512-ALG [N] 
|- AVX512-VPOP  [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] 
|- AVX512-BF16  [N] AVX-VNNI-VEX [N]    AVX-FP128 [Y]   AVX-FP256 [N] 
|- BMI1/BMI2  [Y/Y]         CLWB [N]      CLFLUSH [Y] CLFLUSH-OPT [N] 
|- CLAC-STAC    [N]         CMOV [Y]    CMPXCHG8B [Y]  CMPXCHG16B [Y] 
|- F16C         [Y]          FPU [Y]         FXSR [Y]   LAHF-SAHF [Y] 
|- MMX/Ext    [Y/Y] MON/MWAITX [Y/Y]        MOVBE [Y]   PCLMULQDQ [Y] 
|- POPCNT       [Y]       RDRAND [N]       RDSEED [N]      RDTSCP [Y] 
|- SEP          [Y]          SHA [N]          SSE [Y]        SSE2 [Y] 
|- SSE3         [Y]        SSSE3 [Y]  SSE4.1/4A [Y/Y]      SSE4.2 [Y] 
|- SERIALIZE    [N]      SYSCALL [Y]        RDPID [N]        UMIP [N] 
|- VAES         [N]   VPCLMULQDQ [N]   PREFETCH/W [Y]       LZCNT [Y] 
                                                                                
Features                                                                        
|- 1 GB Pages Support                                      1GB-PAGES   [Capable]
|- 100 MHz multiplier Control                            100MHzSteps   [Capable]
|- Advanced Configuration & Power Interface                     ACPI   [Capable]
|- Advanced Programmable Interrupt Controller                   APIC   [Capable]
|- Advanced Virtual Interrupt Controller                        AVIC   [Capable]
|- APIC Timer Invariance                                        ARAT   [Capable]
|- LOCK prefix to read CR8                                    AltMov   [Capable]
|- Clear Zero Instruction                                     CLZERO   [Missing]
|- Core Multi-Processing                                  CMP Legacy   [Capable]
|- L1 Data Cache Context ID                                  CNXT-ID   [Missing]
|- Collaborative Processor Performance Control                  CPPC   [Missing]
|- Direct Cache Access                                           DCA   [Missing]
|- Debugging Extension                                            DE   [Capable]
|- Debug Store & Precise Event Based Sampling               DS, PEBS   [Missing]
|- CPL Qualified Debug Store                                  DS-CPL   [Missing]
|- 64-Bit Debug Store                                         DTES64   [Missing]
|- Fast Short REP CMPSB|SCASB                                   FSRC   [Missing]
|- Fast Short REP MOVSB                                         FSRM   [Missing]
|- Fast Short REP STOSB                                         FSRS   [Missing]
|- Fast-String Operation                                        ERMS   [Missing]
|- Fused Multiply Add                                           FMA4   [Capable]
|- Fused Multiply Add                                            FMA   [Capable]
|- Hardware Lock Elision                                         HLE   [Missing]
|- Hyper-Threading Technology                                    HTT   [Capable]
|- Hardware P-state control                                      HwP   [Capable]
|- Instruction Based Sampling                                    IBS   [Capable]
|- Instruction INVLPGB                                       INVLPGB   [Missing]
|- Instruction INVPCID                                       INVPCID   [Missing]
|- Long Mode 64 bits                                       IA64 | LM   [Capable]
|- LightWeight Profiling                                         LWP   [Capable]
|- Memory Bandwidth Enforcement                                  MBE   [Missing]
|- Machine-Check Architecture                                    MCA   [Capable]
|- Instruction MCOMMIT                                       MCOMMIT   [Missing]
|- Model Specific Registers                                      MSR   [Capable]
|- Memory Type Range Registers                                  MTRR   [Capable]
|- No-Execute Page Protection                                     NX   [Capable]
|- OS-Enabled Ext. State Management                          OSXSAVE   [Capable]
|- OS Visible Work-around                                       OSVW   [Capable]
|- Physical Address Extension                                    PAE   [Capable]
|- Page Attribute Table                                          PAT   [Capable]
|- Pending Break Enable                                          PBE   [Missing]
|- Process Context Identifiers                                  PCID   [Missing]
|- Perfmon and Debug Capability                                 PDCM   [Missing]
|- Page Global Enable                                            PGE   [Capable]
|- Page Size Extension                                           PSE   [Capable]
|- 36-bit Page Size Extension                                  PSE36   [Capable]
|- Processor Serial Number                                       PSN   [Missing]
|- PREFETCHIT0/1 Instructions                              PREFETCHI   [Missing]
|- Resource Director Technology/PQE                            RDT-A   [Missing]
|- Resource Director Technology/PQM                            RDT-M   [Missing]
|- Read Processor Register at User level                       RDPRU   [Missing]
|- Restricted Transactional Memory                               RTM   [Missing]
|- Safer Mode Extensions                                         SMX   [Missing]
|- Self-Snoop                                                     SS   [Missing]
|- Supervisor-Mode Access Prevention                            SMAP   [Missing]
|- Supervisor-Mode Execution Prevention                         SMEP   [Capable]
|- Trailing Bit Manipulation                                     TBM   [Capable]
|- Translation Cache Extension                                   TCE   [Capable]
|- Time Stamp Counter                                            TSC [Invariant]
|- Time Stamp Counter Deadline                          TSC-DEADLINE   [Missing]
|- TSX Force Abort MSR Register                            TSX-ABORT   [Missing]
|- TSX Suspend Load Address Tracking                       TSX-LDTRK   [Missing]
|- User-Mode Instruction Prevention                             UMIP   [Missing]
|- Virtual Mode Extension                                        VME   [Capable]
|- Virtual Machine Extensions                                    VMX   [Missing]
|- Write Back & Do Not Invalidate Cache                     WBNOINVD   [Missing]
|- Extended xAPIC Support                                     x2APIC   [  xAPIC]
|- AVIC controller for x2APIC                                 x2AVIC   [Missing]
|- XSAVE/XSTOR States                                          XSAVE   [Capable]
|- xTPR Update Control                                          xTPR   [Missing]
|- Extended Operation Support                                    XOP   [Capable]
Mitigation mechanisms                                                           
|- Indirect Branch Restricted Speculation                       IBRS   [ Unable]
   |- IBRS Always-On preferred by processor                            [ Unable]
   |- IBRS preferred over software solution                            [ Unable]
   |- IBRS provides same speculation limits                            [ Unable]
|- Indirect Branch Prediction Barrier                           IBPB   [Capable]
|- Selective Branch Predictor Barrier                           SBPB   [ Unable]
|- Single Thread Indirect Branch Predictor                     STIBP   [ Unable]
|- Speculative Store Bypass Disable                             SSBD   [ Unable]
   |- SSBD use VIRT_SPEC_CTRL register                                 [ Unable]
   |- SSBD not needed on this processor                                [ Unable]
|- No Speculative Return Stack Overflow                      SRSO_NO   [ Unable]
   |- No SRSO at the User-Kernel boundary                              [ Unable]
|- No Branch Type Confusion                                   BTC_NO   [ Unable]
|- BTC on Non-Branch instruction                            BTC-NOBR   [ Unable]
|- Limited Early Redirect Window                            AGENPICK   [ Unable]
|- Arch - No Fast Predictive Store Forwarding                   PSFD   [ Unable]
|- Arch - Enhanced Predictive Store Forwarding                  EPSF   [Missing]
|- Arch - Cross Processor Information Leak                XPROC_LEAK   [ Unable]
Security Features                                                               
|- CET Shadow Stack features                                  CET-SS   [Missing]
|- Secure Init and Jump with Attestation                      SKINIT   [Capable]
|- Secure Encrypted Virtualization                               SEV   [Missing]
|- SEV - Encrypted State                                      SEV-ES   [Missing]
|- SEV - Secure Nested Paging                                SEV-SNP   [Missing]
|- Guest Mode Execute Trap                                      GMET   [Missing]
|- Supervisor Shadow Stack                                       SSS   [Missing]
|- VM Permission Levels                                         VMPL   [Missing]
|- VMPL Supervisor Shadow Stack                             VMPL-SSS   [Missing]
|- Secure Memory Encryption                                      SME   [Missing]
|- Transparent SME                                              TSME   [ Unable]
|- Secure Multi-Key Memory Encryption                         SME-MK   [Missing]
|- DRAM Data Scrambling                                    Scrambler   [ Unable]
                                                                                
Technologies                                                                    
|- Instruction Cache Unit                                                       
   |- L1 IP Prefetcher                                          L1 HW IP   < ON>
|- Data Cache Unit                                                              
   |- L1 Prefetcher                                                L1 HW   < ON>
|- Cache Prefetchers                                                            
   |- L2 Prefetcher                                                L2 HW   < ON>
   |- L1 Stride Prefetcher                                     L1 Stride   < ON>
   |- L1 Region Prefetcher                                     L1 Region   < ON>
   |- L1 Burst Prefetch Mode                                    L1 Burst   < ON>
   |- L2 Stream HW Prefetcher                                  L2 Stream   < ON>
   |- L2 Up/Down Prefetcher                                   L2 Up/Down   < ON>
|- System Management Mode                                       SMM-Lock   [OFF]
|- Simultaneous Multithreading                                       SMT   [OFF]
|- PowerNow!                                                         CnQ   [OFF]
|- Core C-States                                                     CCx   [ ON]
|- Core Performance Boost                                            CPB   <OFF>
|- Watchdog Timer                                                    WDT   < ON>
|- Virtualization                                                    SVM   [OFF]
   |- I/O MMU                                                      AMD-V   [OFF]
   |- Version                                                     [         N/A]
   |- Hypervisor                                                           [OFF]
   |- Vendor ID                                                   [         N/A]
                                                                                
Performance Monitoring                                                          
|- Version                                                        PM       [  1]
|- Counters:          General                   Fixed                           
|           {  6,  0,  4 } x 48 bits            2 x 64 bits                     
|- Enhanced Halt State                                           C1E       <OFF>
|- C2 UnDemotion                                                 C2U       <OFF>
|- C3 UnDemotion                                                 C3U       <OFF>
|- Core C6 State                                                 CC6       <OFF>
|- Package C6 State                                              PC6       <OFF>
|- Legacy Frequency ID control                                   FID       [OFF]
|- Legacy Voltage ID control                                     VID       [OFF]
|- P-State Hardware Coordination Feedback                MPERF/APERF       [ ON]
|- Core C-States                                                                
   |- C-States Base Address                                      BAR   [ 0x813 ]
|- ACPI Processor C-States                                      _CST   [Missing]
|- MONITOR/MWAIT                                                                
   |- State index:    #0    #1    #2    #3    #4    #5    #6    #7              
   |- Sub C-State:     0     0     0     0     0     0     0     0              
   |- Monitor-Mwait Extensions                                   EMX   [Capable]
   |- Interrupt Break-Event                                      IBE   [Capable]
|- Core Cycles                                                         [Capable]
|- Instructions Retired                                                [Missing]
|- Reference Cycles                                                    [Capable]
|- Last Level Cache References                                         [Missing]
|- Global Time Stamp Counter x 40 bits                                 [Capable]
|- Data Fabric Performance Counter                                     [Capable]
|- Core Performance Counter                                            [Capable]
|- Processor Performance Control                                _PCT   [Missing]
|- Performance Supported States                                 _PSS   [Missing]
|- Performance Present Capabilities                             _PPC   [Missing]
|- Continuous Performance Control                               _CPC   [Missing]
                                                                                
Power, Current & Thermal                                                        
|- Temperature Offset:Junction                                 TjMax [  0:  0 C]
|- CPPC Energy Preference                                        EPP   [Missing]
|- Digital Thermal Sensor                                        DTS   [Capable]
|- Power Limit Notification                                      PLN   [Missing]
|- Package Thermal Management                                    PTM   [Missing]
|- Thermal Monitor 1                                             TTP   [Capable]
|- Thermal Monitor 2                                             HTC   [Capable]
|- Thermal Design Power                                          TDP   [Missing]
   |- Minimum Power                                              Min   [Missing]
   |- Maximum Power                                              Max   [Missing]
|- Thermal Design Power                                      Package   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Thermal Design Power                                         Core   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                       Uncore   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                         DRAM   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
|- Thermal Design Power                                     Platform   [Disable]
   |- Power Limit                                                PL1   [    0 W]
   |- Time Window                                                TW1   [   0 ns]
   |- Power Limit                                                PL2   [    0 W]
   |- Time Window                                                TW2   [   0 ns]
|- Package Power Tracking                                        PPT   [Missing]
|- Electrical Design Current                                     EDC   [Missing]
|- Thermal Design Current                                        TDC   [Missing]
|- Core Thermal Point                                                           
|- Package Thermal Point                                                        
|- Units                                                                        
   |- Power                                               watt   [      Missing]
   |- Energy                                             joule   [      Missing]
   |- Window                                            second   [  0.000976562]
Linux:                                                                          
|- Release                                                   [6.11.0-17-generic]
|- Version                                                                                                                                                                                                                                                                                                                                                                                                         
|- Machine                                                              [x86_64]
Memory:                                                                         
|- Total RAM                                                         36573992 KB
|- Shared RAM                                                           33708 KB
|- Free RAM                                                          32962032 KB
|- Buffer RAM                                                           58200 KB
|- Total High                                                               0 KB
|- Free High                                                                0 KB
Clock Source                                                  <            hpet>
CPU-Freq driver                                               [    acpi-cpufreq]
Governor                                                      [       schedutil]
CPU-Idle driver                                               [       acpi_idle]
|- Idle Limit                                                 [              C2]
   |- State        POLL      C1      C2                                         
   |-           CPUIDLE ACPI HL ACPI IO                                         
   |- Power          -1       0       0                                         
   |- Latency         0       0     400                                         
   |- Residency       0       0     800                                         

CPU Pkg  Apic  Core/Thread  Caches      (w)rite-Back (i)nclusive              
 #   ID   ID  CMP ID    ID L1-Inst Way  L1-Data Way      L2  Way      L3  Way 
000:BSP    0   0   0    -1      96  3        32  8      1024 16         0  0  
001:  0    1   0   1    -1      96  3        32  8      1024 16         0  0  
002:  0    2   1   2    -1      96  3        32  8      1024 16         0  0  
003:  0    3   1   3    -1      96  3        32  8      1024 16         0  0  

CPU Freq(MHz) VID  Vcore  TMP(C)    Accumulator       Energy(J)     Power(W)
000   48.83    78  1.0625    0  000000000000000000    0.000000000   0.000000000
001   54.93    78  1.0625    0  000000000000000000    0.000000000   0.000000000
002   46.42    78  1.0625    0  000000000000000000    0.000000000   0.000000000
003   36.91    78  1.0625    0  000000000000000000    0.000000000   0.000000000

             Package[0]    Cores         Uncore        Memory        Platform
Energy(J):   0.000000000   0.000000000   0.000000000   0.000000000   0.000000000
Power(W) :   0.000000000   0.000000000   0.000000000   0.000000000   0.000000000


CPU Freq(MHz) VID  Min     Vcore   Max
000   36.37    78  1.0625  1.0625  1.3750
001   30.85    78  1.0625  1.0625  1.3750
002    6.69    78  1.0625  1.0625  1.3750
003    2.31    78  1.0625  1.0625  1.3750


CPU FLAG CF  ZF  SF  TF  IF  DF  OF IOPL NT  RF  VM  AC  VIF VIP ID 
#0        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0 
#1        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0 
#2        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0 
#3        1   1   1   0   1   1   1   0   0   0   0   0   0   0   0 
CR0: PE  MP  EM  TS  ET  NE  WP  AM  NW  CD  PG CR3: PWT PCD U57 U48
#0    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0 
#1    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0 
#2    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0 
#3    1   1   0   0   1   1   1   1   0   0   1       0   0   0   0 
CR4: VME PVI TSD DE  PSE PAE MCE PGE PCE FX XMM UMIP 5LP VMX SMX FS 
#0    0   0   0   0   1   1   1   1   0   1   1   0   0   0   0   1 
#1    0   0   0   0   1   1   1   1   0   1   1   0   0   0   0   1 
#2    0   0   0   0   1   1   1   1   0   1   1   0   0   0   0   1 
#3    0   0   0   0   1   1   1   1   0   1   1   0   0   0   0   1 
CR4:PCID SAV  KL SME SMA PKE CET PKS U-I LAM FRD            CR8: TPL
#0    0   1   0   1   0   0   0   0   0   0   0                   0 
#1    0   1   0   1   0   0   0   0   0   0   0                   0 
#2    0   1   0   1   0   0   0   0   0   0   0                   0 
#3    0   1   0   1   0   0   0   0   0   0   0                   0 
EFCR    LCK VMX^SGX [SENTER] [ SGX ] LMC                            
#0        -   -   -   -   -   -   -   -                             
#1        -   -   -   -   -   -   -   -                             
#2        -   -   -   -   -   -   -   -                             
#3        -   -   -   -   -   -   -   -                             
EFER     SCE LME LMA NX SVM LMS FFX TCE MCM WBI UAI IBRS            
#0        1   1   1   1   0   0   0   0   0   0   0   0             
#1        1   1   1   1   0   0   0   0   0   0   0   0             
#2        1   1   1   1   0   0   0   0   0   0   0   0             
#3        1   1   1   1   0   0   0   0   0   0   0   0             
XCR0     FPU SSE AVX MPX 512 MPK CEU CES AMX APX LWP                
#0        1   1   1   0   0   0   0   0   0   0   0                 
#1        1   1   1   0   0   0   0   0   0   0   0                 
#2        1   1   1   0   0   0   0   0   0   0   0                 
#3        1   1   1   0   0   0   0   0   0   0   0                 
CFG:     MFD MDM MVD TOM FWB MEM SNP PL  HMK                        
#0        1   0   1   1   1   0   0   0   0                         
#1        1   0   1   1   1   0   0   0   0                         
#2        1   0   1   1   1   0   0   0   0                         
#3        1   0   1   1   1   0   0   0   0                         
HWCR SMM SLW TLB WBI FF FERR IG  MW U-MW HLT SMI RSM SSE WRP MC  IO 
#0    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 
#1    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 
#2    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 
#3    0   0   0   0   0   0   0   0   0   0   0   0   0   0   0   0 
HWCR P0  PRB INC CPB HCF ROC SMU CSE IR SMMB TPR PG U-ID            
#0    0   0   0   0   0   0   0   0   0   0   0   0   0             
#1    0   0   0   0   0   0   0   0   0   0   0   0   0             
#2    0   0   0   0   0   0   0   0   0   0   0   0   0             
#3    0   0   0   0   0   0   0   0   0   0   0   0   0             

@cyring
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cyring commented Aug 10, 2025

  • Idle
2025-08-10-073202_2560x1440_crop
  • Stressed
2025-08-10-075228_2560x1440_crop
  • Thermal throttling ?
2025-08-10-075712_2560x1440_crop

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