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June 15, 2023 18:59
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| "ddr3200": true, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 2960685, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": true, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3750201, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": true, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3750201, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": true, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3488057, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3618615, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3618615, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3356985, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": false, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3356471, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": false, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3356471, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": true, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3487029, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": true, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3487029, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": true, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3224885, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": true, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3355443, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": true, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3355443, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": true, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3093299, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": true, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3223857, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": true, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3223857, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": true, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 2961713, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": true, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3092271, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": true, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 3092271, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": true, | |
| "_reserved_12": false, | |
| "ddr3200": false, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 2895663, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": false, | |
| "_reserved_7": false, | |
| "ddr1866": false, | |
| "_reserved_8": false, | |
| "ddr2133": false, | |
| "_reserved_9": false, | |
| "ddr2400": false, | |
| "_reserved_10": false, | |
| "ddr2667": false, | |
| "_reserved_11": false, | |
| "ddr2933": false, | |
| "_reserved_12": false, | |
| "ddr3200": true, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": true, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "gear_down_mode": false, | |
| "_reserved_": 0, | |
| "slow_mode": false, | |
| "_reserved_2": 0, | |
| "address_command_control": 2960685, | |
| "cke_drive_strength": "30 Ω", | |
| "cs_odt_drive_strength": "30 Ω", | |
| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
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| "cke_drive_strength": "30 Ω", | |
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| "address_command_drive_strength": "30 Ω", | |
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| "cke_drive_strength": "30 Ω", | |
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| "address_command_drive_strength": "30 Ω", | |
| "clk_drive_strength": "30 Ω" | |
| } | |
| ] | |
| }, | |
| { | |
| "header": { | |
| "group_id": 5892, | |
| "entry_id": 72, | |
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| "dq_drive_strength": 62, | |
| "dqs_drive_strength": 62, | |
| "odt_drive_strength": 24, | |
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| } | |
| }, | |
| { | |
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| "dq_drive_strength": 62, | |
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| }, | |
| { | |
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| "dq_drive_strength": 62, | |
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| }, | |
| { | |
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| "dq_drive_strength": 62, | |
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| } | |
| }, | |
| { | |
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| "rtt_park": "34 Ω", | |
| "dq_drive_strength": 62, | |
| "dqs_drive_strength": 62, | |
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| }, | |
| { | |
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| }, | |
| "rtt_nom": "34 Ω", | |
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| "rtt_park": "240 Ω", | |
| "dq_drive_strength": 62, | |
| "dqs_drive_strength": 62, | |
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| "pmu_phy_vref": 103, | |
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| "Range1": "80.80%" | |
| } | |
| }, | |
| { | |
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| }, | |
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| "dq_drive_strength": 62, | |
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| { | |
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| "ddr1600": true, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": true, | |
| "_reserved_9": false, | |
| "ddr2400": true, | |
| "_reserved_10": false, | |
| "ddr2667": true, | |
| "_reserved_11": false, | |
| "ddr2933": true, | |
| "_reserved_12": false, | |
| "ddr3200": true, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": false, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": true, | |
| "single_rank": false, | |
| "dual_rank": false, | |
| "quad_rank": false | |
| }, | |
| "rtt_nom": "60 Ω", | |
| "rtt_wr": "Off", | |
| "rtt_park": "240 Ω", | |
| "dq_drive_strength": 62, | |
| "dqs_drive_strength": 62, | |
| "odt_drive_strength": 24, | |
| "pmu_phy_vref": 91, | |
| "vref_dq": { | |
| "Range1": "71.70%" | |
| } | |
| }, | |
| { | |
| "dimm_slots_per_channel": 2, | |
| "ddr_rates": { | |
| "_reserved_1": false, | |
| "_reserved_2": false, | |
| "_reserved_3": false, | |
| "ddr400": false, | |
| "ddr533": false, | |
| "ddr667": false, | |
| "ddr800": false, | |
| "_reserved_4": false, | |
| "ddr1066": false, | |
| "_reserved_5": false, | |
| "ddr1333": false, | |
| "_reserved_6": false, | |
| "ddr1600": true, | |
| "_reserved_7": false, | |
| "ddr1866": true, | |
| "_reserved_8": false, | |
| "ddr2133": true, | |
| "_reserved_9": false, | |
| "ddr2400": true, | |
| "_reserved_10": false, | |
| "ddr2667": true, | |
| "_reserved_11": false, | |
| "ddr2933": true, | |
| "_reserved_12": false, | |
| "ddr3200": true, | |
| "_reserved_13": false, | |
| "_reserved_14": false, | |
| "_reserved_15": false, | |
| "_reserved_16": false, | |
| "_reserved_17": false, | |
| "_reserved_18": false, | |
| "_reserved_19": false | |
| }, | |
| "vdd_io": { | |
| "1.2 V": true, | |
| "_reserved_1": 0 | |
| }, | |
| "dimm0_ranks": { | |
| "unpopulated": false, | |
| "single_rank": false, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "dimm1_ranks": { | |
| "unpopulated": false, | |
| "single_rank": false, | |
| "dual_rank": true, | |
| "quad_rank": false | |
| }, | |
| "rtt_nom": "60 Ω", | |
| "rtt_wr": "120 Ω", | |
| "rtt_park": "240 Ω", | |
| "dq_drive_strength": 62, | |
| "dqs_drive_strength": 62, | |
| "odt_drive_strength": 24, | |
| "pmu_phy_vref": 104, | |
| "vref_dq": { | |
| "Range1": "77.55%" | |
| } | |
| } | |
| ] | |
| }, | |
| { | |
| "header": { | |
| "group_id": 5892, | |
| "entry_id": 80, | |
| "entry_size": 36, | |
| "instance_id": 0, | |
| "context_type": "Struct", | |
| "context_format": "Raw", | |
| "unit_size": 0, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 0, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "ConsoleOutControl": { | |
| "abl_console_out_control": { | |
| "enable_console_logging": true, | |
| "enable_mem_flow_logging": true, | |
| "enable_mem_setreg_logging": true, | |
| "enable_mem_getreg_logging": false, | |
| "enable_mem_status_logging": true, | |
| "enable_mem_pmu_logging": true, | |
| "enable_mem_pmu_sram_read_logging": false, | |
| "enable_mem_pmu_sram_write_logging": false, | |
| "enable_mem_test_verbose_logging": false, | |
| "enable_mem_basic_output_logging": true, | |
| "_reserved_": 0, | |
| "abl_console_port": 128 | |
| }, | |
| "abl_breakpoint_control": { | |
| "enable_breakpoint": false, | |
| "break_on_all_dies": false | |
| }, | |
| "_reserved_": 0 | |
| } | |
| }, | |
| { | |
| "header": { | |
| "group_id": 5892, | |
| "entry_id": 82, | |
| "entry_size": 132, | |
| "instance_id": 0, | |
| "context_type": "Struct", | |
| "context_format": "Raw", | |
| "unit_size": 0, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 0, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "ErrorOutControl116": { | |
| "enable_error_reporting": false, | |
| "enable_error_reporting_gpio": false, | |
| "enable_error_reporting_beep_codes": false, | |
| "enable_using_handshake": false, | |
| "input_port": 132, | |
| "output_delay": 15000, | |
| "output_port": 128, | |
| "stop_on_first_fatal_error": false, | |
| "_reserved_": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "input_port_size": "32 Bit", | |
| "output_port_size": "32 Bit", | |
| "input_port_type": "FchHtIo", | |
| "output_port_type": "FchHtIo", | |
| "clear_acknowledgement": false, | |
| "_reserved_before_gpio": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "error_reporting_gpio": { | |
| "pin": 85, | |
| "iomux_control": 1, | |
| "bank_control": 192 | |
| }, | |
| "_reserved_after_gpio": [ | |
| 0 | |
| ], | |
| "beep_code_table": [ | |
| { | |
| "custom_error_type": "General", | |
| "peak_map": 1, | |
| "peak_attr": { | |
| "peak_count": 8, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Memory", | |
| "peak_map": 2, | |
| "peak_attr": { | |
| "peak_count": 20, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Df", | |
| "peak_map": 3, | |
| "peak_attr": { | |
| "peak_count": 20, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Ccx", | |
| "peak_map": 4, | |
| "peak_attr": { | |
| "peak_count": 20, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Gnb", | |
| "peak_map": 5, | |
| "peak_attr": { | |
| "peak_count": 20, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Psp", | |
| "peak_map": 6, | |
| "peak_attr": { | |
| "peak_count": 20, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Smu", | |
| "peak_map": 7, | |
| "peak_attr": { | |
| "peak_count": 20, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| }, | |
| { | |
| "custom_error_type": "Unknown", | |
| "peak_map": 2, | |
| "peak_attr": { | |
| "peak_count": 4, | |
| "pulse_width": 0, | |
| "repeat_count": 0, | |
| "_reserved_1": 0 | |
| } | |
| } | |
| ], | |
| "enable_heart_beat": false, | |
| "enable_power_good_gpio": false, | |
| "power_good_gpio": { | |
| "pin": 0, | |
| "iomux_control": 0, | |
| "bank_control": 0 | |
| }, | |
| "_reserved_end": [ | |
| 0, | |
| 0, | |
| 0 | |
| ] | |
| } | |
| }, | |
| { | |
| "header": { | |
| "group_id": 5892, | |
| "entry_id": 83, | |
| "entry_size": 48, | |
| "instance_id": 0, | |
| "context_type": "Struct", | |
| "context_format": "Raw", | |
| "unit_size": 0, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 0, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "ExtVoltageControl": { | |
| "enabled": true, | |
| "_reserved_": [ | |
| 0, | |
| 0, | |
| 0 | |
| ], | |
| "input_port": 132, | |
| "output_port": 128, | |
| "input_port_size": "32 Bit", | |
| "output_port_size": "32 Bit", | |
| "input_port_type": "FchHtIo", | |
| "output_port_type": "FchHtIo", | |
| "clear_acknowledgement": false, | |
| "_reserved_2": [ | |
| 0, | |
| 0, | |
| 0 | |
| ] | |
| } | |
| }, | |
| { | |
| "header": { | |
| "group_id": 5892, | |
| "entry_id": 117, | |
| "entry_size": 20, | |
| "instance_id": 0, | |
| "context_type": "Struct", | |
| "context_format": "Raw", | |
| "unit_size": 0, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 0, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "platform_tuning": [ | |
| { | |
| "Terminator": { | |
| "type_": 65263 | |
| } | |
| }, | |
| { | |
| "Unknown": [ | |
| 0 | |
| ] | |
| }, | |
| { | |
| "Unknown": [ | |
| 0 | |
| ] | |
| } | |
| ] | |
| }, | |
| { | |
| "header": { | |
| "group_id": 12288, | |
| "entry_id": 0, | |
| "entry_size": 520, | |
| "instance_id": 0, | |
| "context_type": "Tokens", | |
| "context_format": "SortAscending", | |
| "unit_size": 8, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 4, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "tokens": [ | |
| { | |
| "Bool": { | |
| "MemLrdimmCapable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemModeUnganged": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PspTpPort": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemDimmTypeDdr3Capable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PspEventLogDisplay": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "GnbAdditionalFeatures": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemForcePowerDownThrottleEnable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PspPsbAutoFuse": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "GnbAdditionalFeatureDsm": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemDqsTrainingControl": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnableParity": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemUdimmCapable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnableBankGroupSwap": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemChannelInterleaving": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemPstate": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemAmp": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemLimitMemoryToBelow1TiB": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnableBankSwizzle": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "VgaProgram": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemSpdReadOptimizationDdr4": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "DfGroupDPlatform": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemHoleRemapping": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "CcxPpinOptIn": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemOcVddioControl": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnableChipSelectInterleaving": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "ConfigureSecondPcieLink": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemUmaAbove4GiB": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemMbistAggressorStaticLaneControl": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemSodimmCapable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemIgnoreSpdChecksum": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemRdimmCapable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEccSyncFlood": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemAutoRefreshsCountForThrottling": "Enabled" | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemNvdimmNDisable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "GeneralCapsuleMode": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "DisplayPmuTrainingResults": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "GnbAdditionalFeatureL3PerformanceBias": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemSwCmdThrottleEnable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnableBankGroupSwapAlt": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemDimmTypeLpddr3Capable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemOnDieThermalSensor": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemAllClocks": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnablePowerDown": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "DxioVgaApiEnable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemUncorrectedEccRetryDdr4": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemOdtsCmdThrottleEnable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemClear": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemPostPackageRepairEnable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemTsmeModeMilan": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemDdr4ForceDataMaskDisable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PspErrorDisplay": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEccRedirection": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemMbistTgtStaticLaneControl": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemDdrRouteBalancedTee": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemQuadRankCapable": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PspStopOnError": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemTempControlledRefreshEnable": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PerformanceTracing": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemTempControlledExtendedRefresh": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "PcieResetControl": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemEnableEccFeature": true | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "BmcInitBeforeDram": false | |
| } | |
| }, | |
| { | |
| "Bool": { | |
| "MemRestoreControl": false | |
| } | |
| } | |
| ] | |
| }, | |
| { | |
| "header": { | |
| "group_id": 12288, | |
| "entry_id": 1, | |
| "entry_size": 728, | |
| "instance_id": 0, | |
| "context_type": "Tokens", | |
| "context_format": "SortAscending", | |
| "unit_size": 8, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 4, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "tokens": [ | |
| { | |
| "Byte": { | |
| "MemMbistAggressorOn": true | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemOverrideDimmSpdMaxActivityCount": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfGmiEncrypt": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemUrgRefLimit": 6 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "BmcEndLane": 129 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemAutoRefreshFineGranMode": "Fixed1Times" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "BmcFunction": 2 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "UmaMode": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "WorkloadProfile": "Disabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistWorseCasGranularity": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "FchSmbusSpeed": { | |
| "Value": 42 | |
| } | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfSysStorageAtTopOfMem": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfMemInterleavingSize": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemNvdimmPowerSource": "DeviceManaged" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfDramNumaPerSocket": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistReadDataEyeVoltageStep": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfRemapAt1TiB": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemDramAddressCommandParityRetryCount": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "Df4LinkMaxXgmiSpeed": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistDataEyeSilentExecution": false | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistAggressorStaticLaneVal": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemDramDoubleRefreshRate": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemDataPoison": "Enabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistTgtStaticLaneVal": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistDataEyeType": "2D Full Data Eye" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "Df3LinkMaxXgmiSpeed": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemHealPprType": "SoftRepair" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "CcxSevAsidCount": "509" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistTestMode": "DataEye" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistAggressorStaticLaneSelEcc": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistReadDataEyeTimingStep": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemHealTestSelect": "Normal" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemRollWindowDepth": { | |
| "Memclks": 255 | |
| } | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "FchConsoleOutSuperIoType": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemHealMaxBankFails": 3 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemRcdParity": true | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfInvertDramMap": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfProbeFilter": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "OdtsCmdThrottleCycles": 87 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemControllerWritingCrcMaxReplay": 8 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfXgmiEncrypt": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemPmuBistTestSelect": { | |
| "algorithm_1": true, | |
| "algorithm_2": true, | |
| "algorithm_3": true, | |
| "algorithm_4": false, | |
| "algorithm_5": false, | |
| "_reserved_0": 0 | |
| } | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemCpuVrefRange": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfSaveRestoreMemEncrypt": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemControllerWritingCrcMode": "Disabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DimmSensorResolution": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "BmcSocket": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "SecondPcieLinkSpeed": "Gen2" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "PcieResetPinSelect": 2 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistDataEyeExecutionRepeatCount": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfBottomIo": 128 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemDataScramble": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "BmcLinkSpeed": "PcieGen1" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfMemClear": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "FchConsoleOutBasicEnable": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistTgtStaticLaneSelEcc": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemDramVrefRange": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfXgmiTxEqMode": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "AblSerialBaudRate": "3000000 Baud" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistPatternLength": 3 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfPstateModeSelect": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemTrainingHdtControl": "StageCompletionMessages1" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfXgmiConfig": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistHaltOnError": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "BmcStartLane": 129 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemSelfRefreshExitStaggering": "Disabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "PmuTrainingMode": "1D,2D" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "CbsMemUncorrectedEccRetryDdr4": true | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemControllerWritingCrcLimit": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemParityErrorMaxReplayDdr4": 8 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemActionOnBistFailure": "DoNothing" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistWriteDataEyeVoltageStep": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "DfMemInterleaving": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistPerBitSlaveDieReport": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "PspEnableDebugMode": "Disabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemRdimmTimingRcdF0Rc0FAdditionalLatency": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "BmcDevice": 5 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistWriteDataEyeTimingStep": 1 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistAggressorsChannels": "7 aggressor/(8 ch)" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "SwCmdThrotCycles": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "FchConsoleOutMode": 0 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistTest": "Enabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "SecondPcieLinkMaxPayload": "HardwareDefault" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemSubUrgRefLowerBound": 4 | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "GnbSmuDfPstateFclkLimit": "Auto" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemMbistPatternSelect": "Both" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "GnbAdditionalFeatureDsmDetector2": "Enabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "MemHealBistEnable": "Disabled" | |
| } | |
| }, | |
| { | |
| "Byte": { | |
| "FchConsoleOutSerialPort": "Uart0Mmio" | |
| } | |
| } | |
| ] | |
| }, | |
| { | |
| "header": { | |
| "group_id": 12288, | |
| "entry_id": 2, | |
| "entry_size": 128, | |
| "instance_id": 0, | |
| "context_type": "Tokens", | |
| "context_format": "SortAscending", | |
| "unit_size": 8, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 4, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "tokens": [ | |
| { | |
| "Word": { | |
| "Dimm3DsSensorCritical": 80 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "ScrubL2Rate": 0 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "Dimm3DsSensorUpper": 66 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "EccSymbolSize": "x16" | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "DimmSensorCritical": 95 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "DimmSensorConfig": 1032 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "ScrubIcacheRate": 0 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "ScrubDramRate": 0 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "ScrubDcacheRate": 0 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "DimmSensorUpper": 80 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "ScrubL3Rate": 0 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "DimmSensorLower": 10 | |
| } | |
| }, | |
| { | |
| "Unknown": { | |
| "entry_id": "Word", | |
| "tag": 3447613827, | |
| "value": 65535 | |
| } | |
| }, | |
| { | |
| "Word": { | |
| "PspSyshubWatchdogTimerInterval": 2600 | |
| } | |
| } | |
| ] | |
| }, | |
| { | |
| "header": { | |
| "group_id": 12288, | |
| "entry_id": 4, | |
| "entry_size": 200, | |
| "instance_id": 0, | |
| "context_type": "Tokens", | |
| "context_format": "SortAscending", | |
| "unit_size": 8, | |
| "priority_mask": { | |
| "hard_force": false, | |
| "high": false, | |
| "medium": false, | |
| "event_logging": false, | |
| "low": false, | |
| "normal": true, | |
| "_reserved_1": 0 | |
| }, | |
| "key_size": 4, | |
| "key_pos": 0, | |
| "board_instance_mask": 65535 | |
| }, | |
| "tokens": [ | |
| { | |
| "Dword": { | |
| "DxioPhyParamDc": "Skip" | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemPowerDownMode": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemBusFrequencyLimit": "Ddr3200" | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemUmaSize": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "DfPciMmioSize": 268435456 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "FchRom3BaseHigh": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemUmaAlignment": 16777152 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "PcieResetGpioPin": 4294967295 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemMbistAggressorStaticLaneSelLo": 0 | |
| } | |
| }, | |
| { | |
| "Unknown": { | |
| "entry_id": "Dword", | |
| "tag": 2120247749, | |
| "value": 2147483647 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemMbistTgtStaticLaneSelLo": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "GnbOffRampStall": 200 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "DfCakeCrcThresholdBounds": { | |
| "Value": 100 | |
| } | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "CcxMinSevAsid": 1 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemMbistTgtStaticLaneSelHi": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "DxioPhyParamPole": "Skip" | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemSelfHealBistTimeout": 10000 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemClockValue": "Ddr2400" | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "CpuFetchFromSpiApBase": 4293918720 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "PspMeasureConfig": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "DxioPhyParamVga": "Skip" | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemMbistAggressorStaticLaneSelHi": 0 | |
| } | |
| }, | |
| { | |
| "Dword": { | |
| "MemUserTimingMode": "Auto" | |
| } | |
| } | |
| ] | |
| } | |
| ] | |
| } |
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