Dmitry Murzinov iDoka

I need to convert a bunch of VHDL files to Verilog.
Found tool http://doolittle.icarus.com/~larry/vhd2vl/
wget http://doolittle.icarus.com/~larry/vhd2vl/vhd2vl-2.5.tar.gz
tar xzf vhd2vl-2.5.tar.gz
cd vhd2vl-2.5/src
try make
If bison & flex are uninstalled, you should run sudo yum install -y flex bison
try make again
If you get /usr/bin/ld: cannot find -lfl it case to hard way: fl mean reffer to library libfl.so but you canot search any mentions of this library:

yum search libfl doesnt work

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I am idoka on github.
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You will receive the following error:

/lib64/ld-lsb-x86-64.so.3: bad ELF interpreter: No such file or directory

sudo yum -y install redhat-lsb

sudo yum reinstall --downloadonly --downloaddir=. redhat-lsb

cable ft2232 vid=0403 pid=6014
bsdl path /soft/Xilinx/Vivado/2018.1/data/parts/xilinx/kintexu/public/bsdl
detect
svf syn/out/keccakd.svf progress stop

How to install amazing tool Universal Radio Hacker onto amazing distro CentOS 7

Intro

Dependency list:

python3
cython
numpy

Here the good methodologies to find and fix segmentation fault errors

Compile you program using the -g -O0 gcc-switch, or add options to string CFLAGS and/or CXXFLAGS in Makefile.
Then use gdb (if need - pass command argument using --args option): gdb --args ./proxmark3 /dev/ttyACM0
Use some gdb magic:

(gdb) run
<segfault happens here>
(gdb) backtrace

Install pip3 on CentOS 7

CentOS 7 still have Python 2.7 as the default tool. EPEL repository comes up with Python 3. Here’s the way to setup Python 3 and pip3 on CentOS environment.

Type on terminal:

sudo yum install -y python34-setuptools
sudo easy_install-3.4 pip

	#########################################################################################
	## Project : Collect of various scripts for working with EDA-tools (ASIC/FPGA/etc) ##
	## Link : https://github.com/iDoka/eda-scripts ##
	## Description: .gitignore ##
	## Usage : just rename or add contain to .gitignore ##
	## License : MIT ##
	#########################################################################################

	## log files
	*.log

	`timescale 1ns/1ps

	module tb();
	reg a;

	nonblocking nba(.a(a));
	blocking ba(.a(a));

	initial begin
	a = 1'b0;