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| [ | |
| { | |
| "name": "DSPSR", | |
| "enc": [3, 3, 4, 5, 0], | |
| "minel": 0, | |
| "width": 32, | |
| "fields": [ | |
| { | |
| "name": "N", | |
| "lsb": 31, |
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| [ | |
| { | |
| "name": "DSPSR", | |
| "enc": [3, 3, 4, 5, 0], | |
| "minel": 0, | |
| "width": 32, | |
| "fields": [ | |
| { | |
| "name": "N", | |
| "lsb": 31, |
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| # requirements: | |
| # pzb from https://github.com/tihmstar/partialZipBrowser | |
| # plutil (included in macOS) | |
| # wget | |
| # openssl | |
| set -e | |
| printf "$1: " | |
| mytemp=$(mktemp -d) |
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| S3_3_c4_c5_0 at min EL0: DSPSR | |
| S3_3_c4_c5_1 at min EL0: DLR | |
| S3_6_c4_c0_0 at min EL3: SPSR_EL3 | |
| S3_6_c4_c0_1 at min EL3: ELR_EL3 | |
| S3_1_c0_c0_0 at min EL1: CCSIDR_EL1 | |
| S3_6_c1_c0_0 at min EL3: SCTLR_EL3 | |
| S3_6_c1_c0_1 at min EL3: ACTLR_EL3 | |
| S3_6_c1_c1_2 at min EL3: CPTR_EL3 | |
| S3_6_c1_c1_0 at min EL3: SCR_EL3 | |
| S3_6_c1_c3_1 at min EL3: MDCR_EL3 |
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| S3_3_c4_c5_0 at min EL0: DSPSR | |
| S3_3_c4_c5_1 at min EL0: DLR | |
| S3_6_c4_c0_0 at min EL3: SPSR_EL3 | |
| S3_6_c4_c0_1 at min EL3: ELR_EL3 | |
| S3_1_c0_c0_0 at min EL1: CCSIDR_EL1 | |
| S3_6_c1_c0_0 at min EL3: SCTLR_EL3 | |
| S3_6_c1_c0_1 at min EL3: ACTLR_EL3 | |
| S3_6_c1_c1_2 at min EL3: CPTR_EL3 | |
| S3_6_c1_c1_0 at min EL3: SCR_EL3 | |
| S3_6_c1_c3_1 at min EL3: MDCR_EL3 |
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| The `dbghalt`, `dbgrestart`, and `dbgack` fields were used during Operation Triangulation. | |
| 0x206040000: | |
| b[31]: dbghalt External halt request, equivalent to the halt from CTI. | |
| Auto-cleared after ACC Core is halted. | |
| b[30]: dbgrestart External restart request, equivalent to the restart from CTI. | |
| Auto-cleared after ACC Core is restarted. | |
| b[29]: dbghaltonrst Halt the ACC Core from the following boot, either cold or warm. |
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| The `chkdatecc` field was set during Operation Triangulation. | |
| 0x206140008: | |
| b[63]: rsvd_63 Reserved | |
| b[62]: cfgerren Enable error register locking and asynchronous reporting when CfgErrESV is set. | |
| b[61]: chksnphit Deprecated | |
| (If set, check that snoops hit in L2C tag, and if they miss, log an error. | |
| If clear, trust the way info from AF and do not read the tags for snoops.) |
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| The `ready` and `enablesize` fields were set during Operation Triangulation. | |
| 0x206140108: | |
| b[63]: ready RAM available for use | |
| b[62:30]: rsvd_62_30 Reserved | |
| b[29:24]: regionbase Base region within LLC (starting way). | |
| Base address does not change. | |
| (EnableSize+RegionBase) must be less than or equal to (RegionNum+1) and | |
| EnableSize must be less than or equal to RegionNum. | |
| b[23:22]: rsvd_23_22 Reserved |
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| S0_0_c4_c0_3 at min EL1: UAOIMM | |
| S0_0_c4_c0_4 at min EL1: PANIMM | |
| S0_0_c4_c0_5 at min EL1: SPSELIMM | |
| S0_3_c4_c0_1 at min EL1: SSBSIMM | |
| S0_3_c4_c0_2 at min EL1: DITIMM | |
| S0_3_c4_c0_6 at min EL1: DAIFSET | |
| S0_3_c4_c0_7 at min EL1: DAIFCLR | |
| S1_0_c7_c10_2 at min EL1: DCCSW | |
| S1_0_c7_c14_2 at min EL1: DCCISW | |
| S1_0_c7_c1_0 at min EL1: ICIALLUIS |
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| S0_0_c4_c0_3 at min EL1: UAOIMM | |
| S0_0_c4_c0_4 at min EL1: PANIMM | |
| S0_0_c4_c0_5 at min EL1: SPSELIMM | |
| S0_3_c4_c0_1 at min EL1: SSBSIMM | |
| S0_3_c4_c0_2 at min EL1: DITIMM | |
| S0_3_c4_c0_6 at min EL1: DAIFSET | |
| S0_3_c4_c0_7 at min EL1: DAIFCLR | |
| S1_0_c7_c10_2 at min EL1: DCCSW | |
| S1_0_c7_c14_2 at min EL1: DCCISW | |
| S1_0_c7_c1_0 at min EL1: ICIALLUIS |
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