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@pixel-stuck
Last active October 23, 2017 19:30
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Init:

ntr: 0xB000000000000000

spi: 0x9F
spi: 0
spi: 0
spi: 0

spi: 6

spi: 6

spi: 6

spi: 6

spi: 6

spi: 0xD8
spi: 0
spi: 0
spi: 0

spi: 0xC7

ntr: 0xC600000000000000

ntr: 0xC75A55AAA53CFFC3

spi: 0xFF

spi: 0x9F
spi: 0
spi: 0
spi: 0

Read:

spi: 3
spi: addr
spi: addr
spi: addr

to get data back, send "spi: 0" to request a byte of data and read AUXSPIDATA to retrieve it. Loop until the desired amount of data has been read

Erase:

spi: 6

spi: 0xD8
spi: addr
spi: addr
spi: addr

after this sequence, a "wait flash busy" should be looped until it returns that it has completed.

spi: 4

Wait flash busy:

spi: 5
spi: 0

to get the result, read AUXSPIDATA. Bit 0 will be clear when the operation has finished, and will be set when the flash is busy.

Write:

spi: 6

spi: 2
spi: addr
spi: addr
spi: addr

to write data, send "spi: data" after the above sequence

after writing data, a wait flash busy sequence is required here.

spi: 4

Other Notes:

  • spi writes that happen in groups, i.e without a newline between them, happen without turning the SPI HW/Cart Slot off. Essentially, newlines represent the SPI hardware being turned off. This is achieved by clearing bits 13 and 15 of AUXSPICNT. Before a new group of SPI commands are sent, bits 13 and 15 are set to turn the hardware on.
  • after writing to the SPI data register, you need to wait for bit 7 in AUXSPICNT to be set; this indicates that the hardware is no longer busy.
  • not all of the init commands are necessarily needed. However, this is simply the order that they appear to be sent in the updater.
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