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@zeta709
Created August 12, 2013 04:33
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Makefile for c and cpp.
# Run 'make -p' to see make's default variables
#COMPILE.c = $(CC) $(CFLAGS) $(CPPFLAGS) $(TARGET_ARCH) -c
#LINK.o = $(CC) $(LDFLAGS) $(TARGET_ARCH)
CFLAGS = -std=c99 -Wall -Wextra -O2
LDLIBS =
TARGET = main
SRCS = main.c mylib.c
OBJS = $(SRCS:.c=.o)
.PHONY: all clean dep
all: $(TARGET)
$(TARGET): $(OBJS)
$(LINK.o) $^ $(LOADLIBES) $(LDLIBS) -o $@
# $(LINK.c) $^ $(LOADLIBES) $(LDLIBS) -o $@
# $(LINK.cc) $^ $(LOADLIBES) $(LDLIBS) -o $@
clean:
$(RM) $(OBJS)
dep:
$(CC) -MM $(SRCS) > .depend
ifeq (.depend,$(wildcard .depend))
include .depend
endif
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